Setup and hold slack in VLSI

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Slack

Slack is defined as difference between actual or achieved time and the desired time for a timing path. For timing path slack determines if the design is working at the specified speed or frequency. 

 

Data Arrival Time

This is the time required for data to travel through data path.

Data Required Time

This is the time taken for the clock to traverse through clock path.

Setup and hold slack is defined as the difference between data required time and data arrival time.

setup slack= Data Required Time- Data Arrival Time

hold slack= Data Arrival Time- Data Required Time

A +ve setup slack means design is working at the specified frequency and it has some more margin as well.

Zero setup slack specifies design is exactly working at the specified frequency and there is no margin available.

Negative setup slack implies that design doesn’t achieve the constrained frequency and timing. This is called as setup violation.

Data arrival time is the time required for data to propagate through source flip flop, travel through combinational logic and routing and arrive at the destination flip-flop before the next clock edge occurs.

 

Arrival Time= Tclk-q+Tcombo

Required Time=Tclock-Tsetup

setup slack= Required Time- Arrival Time

=( Tclock-Tsetup) – (Tclk-q+Tcombo)

13.2. Reg to Output:

Data arrival time is the time required for data to leave source flip-flop, travel through combinational logic and interconnects and leave the chip through output port.

 

Data arrival time is the time required for data to leave source flip-flop, travel through combinational logic and interconnects and leave the chip through output port.

Data arrival time is the time required for the data to start from input port and propagate through combinational logic and end at data pin of the flip-flop.

 

Arrival time=Tcombo

Required time= Tclk-Tsetup

setup slack= Required Time- Arrival Time

=( Tclock-Tsetup) – Tcombo

   

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